Probabilistic Simulation for Reliability Analysis of CMOS VLSI Circuits by

A novel current-estimation approach is developed to support the analysis of electromigration failures in power supply and ground busses of CMOS VLSI circuits. It uses the original concept of probabilistic simulation to e ciently generate accurate estimates of the expected current waveform required for electromigration analysis. As such, the approach is pattern-independent and relieves the designer of the tedious task of specifying logical input waveforms. This approach has been implemented in the program CREST which has shown excellent accuracy and dramatic speedups compared to traditional approaches. We describe the approach and its implementation, and present the results of numerous CREST runs on real circuits. F. Najm is now with the VLSI Design Laboratory, Texas Instruments Inc., Dallas, Texas 75265 This work was supported by Texas Instruments Incorporated, and the US Air Force Rome Air Development Center.